Bangalore, India
Hi, I'm Soumitra.
Staff Software Engineer building high-quality systems software in the Electronic Design Automation domain — with deep roots in C++, performance, and large-scale product development.
01 About
I'm a Staff Software Engineer with a long track record in the EDA (Electronic Design Automation) industry, where correctness and performance are everything. I've worked across the full product life cycle — from marketing specification through to productized delivery — including cross-site product development.
I enjoy digging into hard, low-level problems: data models, netlist graphs, physical-hierarchy modelling, and the infrastructure that makes large designs tractable. I like exploring new ideas and I'm not limited by domain boundaries.
02 Skills
Languages
- C++
- C
- Python
- TCL
- C-Shell
Hardware / HDL
- Verilog
- VHDL
- SystemVerilog
Tools & Environment
- Linux
- GDB
- Perforce
- Git
- ICC / ICC2
Domains
- EDA
- Physical Design
- Compilers
- Data Modelling
03 Experience
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Staff Software Engineer
Synopsys India Pvt. Ltd. Feb 2011 — Present- Clock-Trunk-Planning (CTP): early design-planning to create clock connections across physical hierarchies; stabilised functionality for customer deployment and built checkers to detect and report design clock issues.
- ICC2 Abstraction & Top-Level Optimization: interface-logic modelling, physical-object modelling, and merging abstract changes through the netlist graph; built distributed processing of independent blocks for better turnaround time.
- ICC / ICC2 data model: lightweight model for physical data transformation with widespread usage; added double-patterning data-model support for advanced technology nodes.
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Senior Member Technical
Mentor Graphics (India) Pvt. Ltd. Jul 2007 — Oct 2010- Backend compiler group supporting multiple frontend tools; produced structural netlists from Verilog, VHDL, and SystemVerilog.
- Developed design-wide and synthesis rule checkers to reduce design cycle time.
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Summer Intern
Mentor Graphics (India) Pvt. Ltd. May 2006 — Jun 2006- Fragment parsing of files that may not follow standard Verilog syntax; earned a pre-placement offer.
04 Education & Certifications
B.Tech, Electronics & ECE
Indian Institute of Technology, Kharagpur
Certifications
- Python for Everybody — University of Michigan
- Machine Learning — Stanford University
- Managing Big Data with MySQL — Duke University
- Building Web Applications in PHP — University of Michigan
05 Projects
A growing collection of small projects and experiments. More on the way.
06 Contact
Interested in my work or want to collaborate? Reach out.